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Showing 2 results for Transimpedance Amplifier

Dr. Mehdi Dolatshahi, Mr. Seyed Mehdi Mirsanei, Dr. Mehrdad Amirkhan Dehkordi, Dr. Soorena Zohoori,
Volume 6, Issue 2 (2-2020)

  Common Gate (CG) topologies are commonly used as the first stage in Transimpedance Amplifiers (TIA), due to their low input resistance. But, this structure is not solely used as a TIA and comes with other topologies such as differential amplifiers or negative resistances and capacitances. This paper deals with analyzing the effect of adding an active feedback network to a common gate topology. Generally, the feedback network is used to reduce the input resistance of the CGs topology, but in this paper it is shown that an active feedback network, which occupies a small area, not only reduces further the input resistance of CG topologies, but also forms an active inductive behavior, which can be used to resonate with the large parasitic capacitance of the photodiode and hence obtain a wide bandwidth. Mathematical analysis is done in this paper to prove the existence of this active inductor, which is also proved in the simulations. Finally, it is shown that this stage alongside its active feedback can be used as a high-speed and low-power transimpedance amplifier for optical communication applications.
Mr Mohammad Dehghanpour Farashah, Dr Majid Pourahmadi, Dr Ali Mirvakili,
Volume 7, Issue 2 (3-2021)

In this paper, a low power and wideband Regulated Cascode (RGC)-based Transimpedance Amplifier (TIA) is presented to be used for the short range optical receiver systems. In this structure, input dominant parasitic capacitance is isolated by adding a cascoded inverter amplifier as a fully active feedback network in the booster of an RGC amplifier. As a result, a 6.4 GHz bandwidth is obtained at a lower power consumption. In addition, for eliminating the effect of output parasitic capacitance by resonating with an inductor and widening the bandwidth, an active inductive load is implemented at the output node of the proposed TIA circuit. Therefore, considering two main points of isolation of input parasitic capacitance effect and reduction of load parasitic capacitance effect, bandwidth is increased without using a high amount of power consumption. Based on the results simulated in HSPICE using 90 nm CMOS technology, the proposed TIA can reach the data bit rate of 10Gb/s. In addition, the proposed TIA consumes only 1.6mW of power, and has the gain of 40dBΩ across the 6.4 GHz of bandwidth.

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سامانه های غیرخطی در مهندسی برق Journal of Nonlinear Systems in Electrical Engineering
نشریه سامانه‌های غیرخطی در مهندسی برق در خصوص اصول اخلاقی انتشار مقاله، از توصیه‌های «کمیته بین‌المللی اخلاق نشر» موسوم به COPE و «منشور و موازین اخلاق پژوهش» مصوب معاونت پژوهش و فناوری وزارت علوم، تحقیقات و فناوری تبعیت می‌کند.
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